In this post I would like to describe the different LCD parameters and their calculations.
First we understand the LCD display parameters with the following diagram.
In the diagram we have the following terms:
H-Sync: A horizontal synchronize pulse used to synchronize/signal the start of a scan line. Here a scan line means one row/line (of pixels) in the LCD. The signal can be low or a high pulse of a certain duration determined by the setup time (Thsys) and hold time (Thsyh) of this pulse. It is usually mentioned in nano seconds which can also be converted to dotclks which I will come to later.
V-Sync: A veritical synchronize pulse used to synchronize/signal the start of each frame. Here the frame is inclusive of all the vertical and horizontal porches and the H-Sync pulse. The signal can be a low or a high pulse of a certain duration determined by the setup (Tvsys) and hold time (Tvsyh) of this pulse.
HBP and HFP: Horizontal back and front porches. It is used to "eat away" a certain set of pixel clocks before the active line starts and ends. The porch which is before the active line starts is called the back porch and the porch which is after the active line ends is called the front porch. Linux term is left_margin and right_margin for HBP and HFP respectively.
VBP and VFP: Vertical back and from porches. It is used to "eat away" a certain set of lines before after the actual frame starts and ends. Again the porch which is before the active frame is called the back porch and the porch which is after the active frame ends is called the front porch. Linux term is upper_margin and lower_margin for VBP and VFP respectively.
To illustrate the above concepts I will put some of the figures from datasheets
The below example shows the HSYNC in relation to the active pixels, HBP, HFP and also the DOTCLK.
In the diagram above you can see the HSYNC low pulse. The pixel data will keep sending dummy data till the back porch ends with the continuously ticking DOTCLK providing the timing for the HSYNC, HBP, actual pixel data and the HFP. The HBP and HFP period should be a multiple of the DOTCLK period.
Another timing diagram is from the S3C2440 data sheet.
Here we can see the interrupt for the frame sync i.e. VSYNC which is INT_FrSync. This interrupt is useful for the double buffering technique where we can load the image onto an inactive frame buffer between the VSYNCs. When we get the interrupt from the VSYNC we can just change the pointer from the active framebuffer to the back buffer which becomes the active framebuffer. We can start loading the previous framebuffer which becomes inactive.
As seen in the figure the VSYNC and the HSYNC rising edge of the pulse for the start of the frame coincide. In this case the VSYNC and the HSYNC are high pulses. In the figure the VSYNC pulse width is equal to a HSYNC clock period. The polarity of the SYNC pulses can be controlled in the LCDCON5 register. The DOTCLK polarity too can be controlled. As per the figure we can get the follow formula for the Horizontal line time period:
Also for the time for a single frame can be calculated as:
I will explain why porches are needed in the coming sections.
First we understand the LCD display parameters with the following diagram.
In the diagram we have the following terms:
H-Sync: A horizontal synchronize pulse used to synchronize/signal the start of a scan line. Here a scan line means one row/line (of pixels) in the LCD. The signal can be low or a high pulse of a certain duration determined by the setup time (Thsys) and hold time (Thsyh) of this pulse. It is usually mentioned in nano seconds which can also be converted to dotclks which I will come to later.
V-Sync: A veritical synchronize pulse used to synchronize/signal the start of each frame. Here the frame is inclusive of all the vertical and horizontal porches and the H-Sync pulse. The signal can be a low or a high pulse of a certain duration determined by the setup (Tvsys) and hold time (Tvsyh) of this pulse.
HBP and HFP: Horizontal back and front porches. It is used to "eat away" a certain set of pixel clocks before the active line starts and ends. The porch which is before the active line starts is called the back porch and the porch which is after the active line ends is called the front porch. Linux term is left_margin and right_margin for HBP and HFP respectively.
VBP and VFP: Vertical back and from porches. It is used to "eat away" a certain set of lines before after the actual frame starts and ends. Again the porch which is before the active frame is called the back porch and the porch which is after the active frame ends is called the front porch. Linux term is upper_margin and lower_margin for VBP and VFP respectively.
To illustrate the above concepts I will put some of the figures from datasheets
The below example shows the HSYNC in relation to the active pixels, HBP, HFP and also the DOTCLK.
In the diagram above you can see the HSYNC low pulse. The pixel data will keep sending dummy data till the back porch ends with the continuously ticking DOTCLK providing the timing for the HSYNC, HBP, actual pixel data and the HFP. The HBP and HFP period should be a multiple of the DOTCLK period.
Another timing diagram is from the S3C2440 data sheet.
Here we can see the interrupt for the frame sync i.e. VSYNC which is INT_FrSync. This interrupt is useful for the double buffering technique where we can load the image onto an inactive frame buffer between the VSYNCs. When we get the interrupt from the VSYNC we can just change the pointer from the active framebuffer to the back buffer which becomes the active framebuffer. We can start loading the previous framebuffer which becomes inactive.
As seen in the figure the VSYNC and the HSYNC rising edge of the pulse for the start of the frame coincide. In this case the VSYNC and the HSYNC are high pulses. In the figure the VSYNC pulse width is equal to a HSYNC clock period. The polarity of the SYNC pulses can be controlled in the LCDCON5 register. The DOTCLK polarity too can be controlled. As per the figure we can get the follow formula for the Horizontal line time period:
One horizontal line time period = HSYNC width + Horizontal Back porch width + Horizontal data time + Horizontal Front porch width
Also for the time for a single frame can be calculated as:
One frame time period = Vertical Sync pulse width + Vertical back porch + Complete frame time + Vertical back porch
I will explain why porches are needed in the coming sections.
