A shameless plug, if anybody needs to have bare metal firmware developed and need help in implementing it please leave a message. It would be great if you are hiring as I am open to good career opportunities.
Saturday, 20 February 2016
USB Development on the S3C2440 update
Long time since my last post. I had initially started off with the ethernet driver development but kept it pending due the lack of understanding of the timing diagrams. In its place I have started off with USB development. I will have a detailed write up once I have something going.
Thursday, 28 January 2016
FriendlyARM Nano Pi2 review
I received two NanoPi2 samples from FriendlyARM somewhere around the first week of January. It took more than month to reach India from China using China Post.
I was very excited about this as you would already know that I am developing a baremetal OS for the older mini2440. I had been informed that the mini2440 is out of production and in its place the newer and much smaller NanoPI with the S3C2451 chip is made available.
Just a few details about the NanoPi, it is a ARM9 S3C2451 chip running at 400Mhz with 64MB of DDR2. It has the usual interfaces as present in the S3C2440 based Mini2440 board.
Now coming to the NanoPi2 what is really impressive is the size of this thing. It has a size of 75mmx40mm. It is lesser than the size of a credit card approaching the size of a USB dongle. FriendlyARM has done a real good job in making a board with such a small form factor.
The NanoPi2 comes packed with Samsung S5P 4418 Quad Core Cortex-A9 at 1.4G Hz with 1GB 32bit DDR3 RAM. As you would know for my baremetal programming I am mainly interested in the processor and RAM. Once I get this beast up, rest of the things follow much faster. There are two micro SD Slots, a USB 2.0 Host Type A, a micro USB for data input and power. It has 40 pin GPIO good enough for plenty of debugging.
It has pins for camera and LCD connections and HDMI output.
From the connectivity side it has Wifi and Bluetooth support with BLE4.0.
There is support for Linux (Debian Jessie) and Android (4.4.2) Kitkat.
Now for the unboxing and setup. The NanoPi2 comes in a neat card board case. It looks like a wallet and is beautiful.
Side view of the beautiful card board case
Size comparison of the NanoPi2 with my meal pass card. It is really impressive.
The NanoPi2 connected to the PSU and RS232 board which is provided separately.
Finally
I got this cute NanoPi2 case to put into. I am not sure whether it is
3D printed but it sure looks like it. It looks like a cute soap box.
Debian Jessie running out of the box with the HDMI output connected to my monitor. You can also find my dear MINI2440 board photo bombing at the right side :)
This is a really neat evaluation board for Robotics, IoT with its Bluetooth and Wifi connectivity. Considering how small it is I think it also goes well with controlling of drones.
This is also a really good board for the maker community.
I am really excited in developing for this board especially to try to see if I can get my baremetal OS running on it.
Special thanks to Friendly ARM for gifting two samples of this board and kudos to them for making boards with such impressive form factor and functionality.
Simplicity is prerequisite for reliability. -- Edsger W. Dijkstra
Wednesday, 27 January 2016
MINI2440 memory address banks and SDRAM setup.
Initially the loader can be booted up without setting the RAM. This is achieved by the stepping stone controller. This controller fetches first 4KB of data from the NAND flash and places it in the 4KB SRAM called the stepping stone buffer.
This SRAM is good enough for the loader to load the MDK OS. To do anything serious we need to setup the SDRAM.
To proceed further we need to understand the datasheet thoroughly.
From the datasheet we have:
Our memory being the K4S561632N its organization is 4 x 4,194,304 words by 16bits (i.e. 16M x 16). The x16 forms the data bus width i.e. 16 bits or 2 bytes. The "words" in the above sentence means this data bus width i.e. 16 bits. Hence the SDRAM outputs a "word".
Also here 268,435,456 bits is 32MB or 256Mb.
Notice that all the memories have "4 x " prefix. This is because all these memories have 4 banks and therefore are 4 bank operation chips.
The organization in the data sheet is as follows for the 3 different memories:
In this case our memory organization is the 16Mx16 with Row Address from A0~A12 and Column Address from A0-A8.
Hence we can have 2^13 addressable rows and 2^9 addressable columns to make it 4194304 addressable words in each bank. Hence 4 banks x 4194304 addressable words become a total of 16777216 words. Since each word is 16 bits or 2 bytes the chip capacity is 32MB (=16777216 x 2 bytes (16 bits) = 33554432 or 32MB).
Similarly we can figure out the numbers for the other 2 memories.
For the K4S560832N:
4 x 8,388,608 words = 33554432 words.
Since it is 8 bits per word or 1 byte per word it is 33554432 x 1 = 33554432 or 32MB.
For the K4S560432N:
4 x 16,777,216 = 67108864 words.
Since it is 4 bits per word or 1/2 a byte per word it is 67108864 x 1/2 = 33554432 or 32MB.
Now we come to how these memory chips are wired to our processor. A diagram of how the chips are wired to the processor is below (ASCII art courtesy of Juergen Borleis of Pengutronix mailing list for helping me understand the bank map configuration):
If we go back to schematic we can find that nGCS6 with net name LLnSCS0 is connected to nSCS (SDRAM Chip Select) input of the two 32 MB chips.
According to the data sheet the nGCS6 forms Bank 6. Hence the two SDRAM chips are connected to Bank6 with both 16 bit bus width forming connected to the 32 bit data bus of the processor. You can verify this in the schematic snapshot below:
You can see that the LDATA0 to LDATA15 connections from chip1 and LDATA16 to LDATA31 from chip2 forming the 32 bit data bus width.
When an address say 'A' is sent on the address lines for a read from the address then the chip U6 will respond with the data set in address 'A' through LDATA0 - LDATA15. Since the same address lines are fed to chip U7 it too responds with the data set in address 'A' through LDATA16 - LDATA31. When a write is done to address 'A', the first 16 bit data is set in the address 'A' of chip U6 and the send 16 bit data is set in address 'A' of chip U7.
Notice that the address pin connections start at ADDR2. For a 32 bit data bus the address is at 4 byte boundaries.
Notice that LADDR24 and LADDR25 lines are set as inputs to BA0 and BA1 respectively. BA0 and BA1 forms bank select pins for the chip.
Now why is LADDR24 and LADDR25 pins selected?
Here the DW6 parameter is set to DW6_32b i.e. bus width as 32 bit.
My SDRAM init is as follows:
I set the BANKCON6 register to Sync DRAM as it is SDRAM (Synchronous DRAM). For the memory type of SDRAM I set SCAN parameter to SCAN_9BIT as it is A0-A8 or 9 bit.
Bank7 has to be disabled. Set the BANKCON7 register to MT_ROM_SRAM as it is set default to MT_SYNC_DRAM which should be removed.
There is Trcd or RAS to CAS delay to set. In the datasheet the RAS to CAS latency or Trcd(min) is 20ns. In our processor we have setup the HCLK to be 101 Mhz or 9.99ns ~ 10ns. Hence we have to setup or Trcd to have to 2 clock delay which is 00.
Refresh control register (REFRESH):
We set REFEN which is self auto refresh.
We set TREFMD to 0 CBR/Auto refresh mode.
We set the SDRAM RAS pre-charge time to 2 clocks i.e. value 00 as the data sheet gives a tRP(min) as 20ns or 2 clock cycles.
We set the SDRAM semi row cycle time Tsrc to Tsrc_5. The calculation is as follows:
Trc = Tsrc + Trp
or
Tsrc = Trc - Trp
From the data sheet we have Trc as 65ns Trp as 20 ns. Hence we get Tsrc as 45ns. Hence we set Tsrc_5 which is 5 clocks or 50ns.
I set the refresh counter to 1269 as given in the data sheet example.
Banksize register settings (BANKSIZE):
Here I enable BURST_EN(burst enable), SCKE_EN (SDRAM power down mode enable), SCLK_EN (SCLK being enabled during SDRAM access cycle to reduce power consumption) and BANK76MAP set to 001 or 64MB as the size of the memory is 32MiB + 32MiB = 64MiB.
SDRAM Mode register set register (MRSR):
We simply set the CL parameter or the CAS Latency to 2 clocks. According to the data sheet the CAS latency is 2.
A note on the memory controller bank select:
The S3C2440 has 8 memory banks. The General Chip select or nGCS should be connected to the different chip selects of the various peripherals connected which use the address space.
The banks are activated when the address of a memory is within the address region of the bank. This takes the burden out of doing a chip select manually whenever you want to access the memory region. Hence you can multiplex the address lines to different chips in different banks. When an address is generated the chip in the memory region is automatically selected using the bank chip select signal. I will verify this and provide an oscilloscope trace.
For reference from the data sheet:
Conclusion:
We do all the SDRAM setup in the loader itself as the MDK OS is loaded onto the SDRAM.
References: http://thread.gmane.org/gmane.comp.embedded.ptxdist.oselas.community/1994/focus=2010
Schematics from FriendlyARM.
Data sheet snapshots from Samsung S3C2440 data sheet.
Memory organization snap shots from Samsung K4S561632N data sheet.
This SRAM is good enough for the loader to load the MDK OS. To do anything serious we need to setup the SDRAM.
My setup:
In my MINI2440 board I have two Samsung K4S561632N SDRAM chips each of size 32MB totalling 64MB of SDRAM.To proceed further we need to understand the datasheet thoroughly.
From the datasheet we have:
The K4S560432N / K4S560832N / K4S561632N is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,777,216 words by 4 bits / 4 x 8,388,608 words by 8bits / 4 x 4,194,304 words by 16bits.The SRAM type table is as follows:
Our memory being the K4S561632N its organization is 4 x 4,194,304 words by 16bits (i.e. 16M x 16). The x16 forms the data bus width i.e. 16 bits or 2 bytes. The "words" in the above sentence means this data bus width i.e. 16 bits. Hence the SDRAM outputs a "word".
Also here 268,435,456 bits is 32MB or 256Mb.
Notice that all the memories have "4 x " prefix. This is because all these memories have 4 banks and therefore are 4 bank operation chips.
The organization in the data sheet is as follows for the 3 different memories:
In this case our memory organization is the 16Mx16 with Row Address from A0~A12 and Column Address from A0-A8.
Hence we can have 2^13 addressable rows and 2^9 addressable columns to make it 4194304 addressable words in each bank. Hence 4 banks x 4194304 addressable words become a total of 16777216 words. Since each word is 16 bits or 2 bytes the chip capacity is 32MB (=16777216 x 2 bytes (16 bits) = 33554432 or 32MB).
Similarly we can figure out the numbers for the other 2 memories.
For the K4S560832N:
4 x 8,388,608 words = 33554432 words.
Since it is 8 bits per word or 1 byte per word it is 33554432 x 1 = 33554432 or 32MB.
For the K4S560432N:
4 x 16,777,216 = 67108864 words.
Since it is 4 bits per word or 1/2 a byte per word it is 67108864 x 1/2 = 33554432 or 32MB.
Now we come to how these memory chips are wired to our processor. A diagram of how the chips are wired to the processor is below (ASCII art courtesy of Juergen Borleis of Pengutronix mailing list for helping me understand the bank map configuration):
----------+ /CS to bank#2
|----------------------------------------------------------
| | |
S3C2440 | /CS to bank#1 | |
|------------------------------ | |
| | | | |
| +--------+ +--------+ +--------+ +--------+
| | SDRAM1 | | SDRAM2 | | SDRAM3 | | SDRAM4 |
| | | | | | | | |
| +--------+ +--------+ +--------+ +--------+
| 0..15 | |16..31 0..15| |16..31
| | | | |
|----------------------------------------------------------
| 32 bit databus
|
----------+
If we go back to schematic we can find that nGCS6 with net name LLnSCS0 is connected to nSCS (SDRAM Chip Select) input of the two 32 MB chips.
Coming back to the data sheet we see that nGCS6 starts at memory address 0x30000000. Hence our SDRAM memory address starts from 0x30000000. The snapshot of the memory map is below:
According to the data sheet the nGCS6 forms Bank 6. Hence the two SDRAM chips are connected to Bank6 with both 16 bit bus width forming connected to the 32 bit data bus of the processor. You can verify this in the schematic snapshot below:
You can see that the LDATA0 to LDATA15 connections from chip1 and LDATA16 to LDATA31 from chip2 forming the 32 bit data bus width.
When an address say 'A' is sent on the address lines for a read from the address then the chip U6 will respond with the data set in address 'A' through LDATA0 - LDATA15. Since the same address lines are fed to chip U7 it too responds with the data set in address 'A' through LDATA16 - LDATA31. When a write is done to address 'A', the first 16 bit data is set in the address 'A' of chip U6 and the send 16 bit data is set in address 'A' of chip U7.
Notice that the address pin connections start at ADDR2. For a 32 bit data bus the address is at 4 byte boundaries.
Notice that LADDR24 and LADDR25 lines are set as inputs to BA0 and BA1 respectively. BA0 and BA1 forms bank select pins for the chip.
Now why is LADDR24 and LADDR25 pins selected?
- There are 4 banks per chip. Hence the 2 bit combination will allow to select the 4 banks.
- If the bits below LADDR24 are set to 1 it becomes 0xFFFFFF which is 16777215(starting from 0) which is the size of the 4 banks. (4 x4M words). Since the address starts at LADDR2 shift the LADDR24 and LADDR25 by 2 bits to the right. Now we get 0x3FFFFF which is 4194303 (starting from 0) which is the size of the single bank. A 4194304 address switches the bank to 1. Hence as far as I see this is the explanation for the bank switching using the addresses themselves i.e. when the bits of the addresses corresponding to banks change there is a bank switch.
Register setup:
We finally come to source code for the SDRAM setup.
First we need to configure Bus Width and Wait Control register (BWSCON)
The code is as follows:
1 2 3 4 5 6 7 8 | void config_bwscon() { /* Configure BWSCON */ writereg32(BWSCON_REG(MEM_BA), DW7_RESERVED|DW6_32b|DW5_RESERVED|DW4_RESERVED| DW3_RESERVED|DW2_RESERVED|DW1_RESERVED); } |
Here the DW6 parameter is set to DW6_32b i.e. bus width as 32 bit.
My SDRAM init is as follows:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 | void sdram_init() { config_bwscon(); /* Configure BANKCON6/BANKCON7 */ writereg32(BANKCON6_REG(MEM_BA),MT_SYNC_DRAM|SCAN_9BIT); /* * Set BANKCON7 to ROM/SRAM i.e 00 and not SYNC_DRAM. * Rest of the values should not be used as they are reserved * Default value is SYNC_DRAM which should not be used. */ writereg32(BANKCON7_REG(MEM_BA),MT_ROM_SRAM); /* Configure SDRAM Refresh settings */ writereg32(REFRESHCTL_REG(MEM_BA),REFEN|Tsrc_5|1269); /* Configure Banksize setting */ writereg32(BANKSIZE_REG(MEM_BA),BURST_EN|SCKE_EN|SCLK_EN|BK76MAP_64MB); /* Configure mode set register for BANK6 */ writereg32(MRSRB6_REG(MEM_BA),CAS_LATENCY_2CLK); return; } |
I set the BANKCON6 register to Sync DRAM as it is SDRAM (Synchronous DRAM). For the memory type of SDRAM I set SCAN parameter to SCAN_9BIT as it is A0-A8 or 9 bit.
Bank7 has to be disabled. Set the BANKCON7 register to MT_ROM_SRAM as it is set default to MT_SYNC_DRAM which should be removed.
There is Trcd or RAS to CAS delay to set. In the datasheet the RAS to CAS latency or Trcd(min) is 20ns. In our processor we have setup the HCLK to be 101 Mhz or 9.99ns ~ 10ns. Hence we have to setup or Trcd to have to 2 clock delay which is 00.
Refresh control register (REFRESH):
We set REFEN which is self auto refresh.
We set TREFMD to 0 CBR/Auto refresh mode.
We set the SDRAM RAS pre-charge time to 2 clocks i.e. value 00 as the data sheet gives a tRP(min) as 20ns or 2 clock cycles.
We set the SDRAM semi row cycle time Tsrc to Tsrc_5. The calculation is as follows:
Trc = Tsrc + Trp
or
Tsrc = Trc - Trp
From the data sheet we have Trc as 65ns Trp as 20 ns. Hence we get Tsrc as 45ns. Hence we set Tsrc_5 which is 5 clocks or 50ns.
I set the refresh counter to 1269 as given in the data sheet example.
Banksize register settings (BANKSIZE):
Here I enable BURST_EN(burst enable), SCKE_EN (SDRAM power down mode enable), SCLK_EN (SCLK being enabled during SDRAM access cycle to reduce power consumption) and BANK76MAP set to 001 or 64MB as the size of the memory is 32MiB + 32MiB = 64MiB.
SDRAM Mode register set register (MRSR):
We simply set the CL parameter or the CAS Latency to 2 clocks. According to the data sheet the CAS latency is 2.
A note on the memory controller bank select:
The S3C2440 has 8 memory banks. The General Chip select or nGCS should be connected to the different chip selects of the various peripherals connected which use the address space.
The banks are activated when the address of a memory is within the address region of the bank. This takes the burden out of doing a chip select manually whenever you want to access the memory region. Hence you can multiplex the address lines to different chips in different banks. When an address is generated the chip in the memory region is automatically selected using the bank chip select signal. I will verify this and provide an oscilloscope trace.
For reference from the data sheet:
Conclusion:
We do all the SDRAM setup in the loader itself as the MDK OS is loaded onto the SDRAM.
References: http://thread.gmane.org/gmane.comp.embedded.ptxdist.oselas.community/1994/focus=2010
Schematics from FriendlyARM.
Data sheet snapshots from Samsung S3C2440 data sheet.
Memory organization snap shots from Samsung K4S561632N data sheet.
It is better to do the right problem the wrong way than the wrong problem the right way. --Richard Hamming
Thursday, 7 January 2016
Notes on Linux virtual memory page walk.
A simple test of virt_to_phys translation and accessing of physical RAM
I wanted to test the actual writing of a value on the physical RAM.
Hardware is a S3C2440 or a Wandboard.
Create a module and use virt_to_phys(mem). The "mem" should be pointing to the
memory address allocated using kmalloc(..). Print the value and note it down. Hit
the reset switch. When the bootloader boots up print the location using md.b <addr> 1.
The value should be present on that particular location.
Some statistics on the S3C2440:
PAGE_OFFSET 0xC0000000
PLATFORM_PHYS_OFFSET 0x30000000 --> The actual starting physical memory.
The memory map says that it starts from 0x30000000
The calculation of the physical address is from the formula:
PHYSICAL_ADDRESS = KERNEL_VIRTUAL_ADDRESS - PAGE_OFFSET + PLATFORM_PHYS_OFFSET.
Explanation for the above formula:
The kernel virtual address starts from 0xC0000000. To get to the physical address with base '0' subtract it from
the PAGE_OFFSET. To get to the actual physical address based on the memory mapped address add it with the
PLATFOR_PHYS_OFFSET.
Bootup physical and virtual memory setup.
The paging unit startup is present in arch/arm/kernel/head.S
The kernel virtual RAM addr is based on the formula KERNEL_RAM_VADDR = PAGE_OFFSET + TEXT_OFFSET
The TEXT_OFFSET starts off at 0x00008000 which is defined in arch/arm/Makefile as TEXT_OFFSET := $(textofs-y)
where textofs-y := 0x00008000. Therefore the KERNEL_RAM_VADDR starts at 0xC0008000
The swapper_pg_dir starts off at (KERNEL_RAM_VADDR - PG_DIR_SIZE) where PG_DIR_SIZE is 0x4000. So the value is
0xC0008000 - 0x4000 = 0xC0004000. The swapper_pg_dir is the virtual address of the initial page table.
Initial page tables are setup with r8 having the phys_offset, r9 with cpuid and r10 the processor info.
It returns r4 which contains the physical page table address.
Initially an identity mapping is done i.e. the virtual address will have the same physical address. This will
later be removed once the kernel starts up fully.
The i/o space is also mapped so that the UART can be used before the paging unit is initialized.
Virtual memory for address space.
Glossary:
Page Frames -> Physical pages. Each page frame contains a page i.e. length of page frame coincides with a page.
Page -> A block of data that is stored in a page frame or disk.
pgd -> Page global directory.
pmd -> Page middle directory.
pte -> Page table entry.
1) Each process has a structure associated with it called mm_struct(include/linux/mm_types.h). Like a process list the
mm_struct of each process are linked together as a linked list.
2) Each process has a pgd,pmd and a pte associated with it.
3) If a region is backed by a file, its vm_file (include/linux/fs.h) field will be set in "struct vm_region".
By traversing vm_file->f_dentry->d_inode->i_mapping,(linux/path.h,linux/dcache.h,linux/fs.h,linux/fs.h) the
associated address_space for the region may be obtained using the address_space_operations a_ops field. This
structure has all the filesystem specific information required to perform page-based operations on disk. This
structure is the address_space_operations which contains writepage,readpage etc. methods.
4) Initial parent mm_struct is initialized using INIT_MM_CONTEXT macro in mm/init-mm.c
5) A thread can be identified in the task list by finding all "task_structs" that have pointers to the same mm_struct.
6) Each memory region is respresented by a "vm_area_struct", which never overlaps. A full list of mapped regions that a
process has may be viewed using the proc interface at /proc/PID/maps.
7) VMA supports vma operations using the "vm_operations_struct" using the methods open(),close() and nopage().
8) mmap() is used to create new memory regions within a process. *DOUBT* Initial memory regions and initial process exec.
The pgd,pmd and pte are allocated in the kernel space. Verified by checking the address which is 0xC0000000 plus.(This is obvious).
** Each task's "thread_info" structure is allocated at the endo of its stack. The task element of the structure is a pointer to the
task's actual task_struct.(Ref: Linux Kernel Development book. Chapter 3 Pg 27) **
It is useful to be able to quickly look up the process descriptor of the currently executing task, which is done via current macro.
Exercise:
1) Given a process number traverse the mm_struct list and dump the pgd address.
I have written a rough test module for my understanding.
The output log file captured is as follows:
I wanted to test the actual writing of a value on the physical RAM.
Hardware is a S3C2440 or a Wandboard.
Create a module and use virt_to_phys(mem). The "mem" should be pointing to the
memory address allocated using kmalloc(..). Print the value and note it down. Hit
the reset switch. When the bootloader boots up print the location using md.b <addr> 1.
The value should be present on that particular location.
Some statistics on the S3C2440:
PAGE_OFFSET 0xC0000000
PLATFORM_PHYS_OFFSET 0x30000000 --> The actual starting physical memory.
The memory map says that it starts from 0x30000000
The calculation of the physical address is from the formula:
PHYSICAL_ADDRESS = KERNEL_VIRTUAL_ADDRESS - PAGE_OFFSET + PLATFORM_PHYS_OFFSET.
Explanation for the above formula:
The kernel virtual address starts from 0xC0000000. To get to the physical address with base '0' subtract it from
the PAGE_OFFSET. To get to the actual physical address based on the memory mapped address add it with the
PLATFOR_PHYS_OFFSET.
Bootup physical and virtual memory setup.
The paging unit startup is present in arch/arm/kernel/head.S
The kernel virtual RAM addr is based on the formula KERNEL_RAM_VADDR = PAGE_OFFSET + TEXT_OFFSET
The TEXT_OFFSET starts off at 0x00008000 which is defined in arch/arm/Makefile as TEXT_OFFSET := $(textofs-y)
where textofs-y := 0x00008000. Therefore the KERNEL_RAM_VADDR starts at 0xC0008000
The swapper_pg_dir starts off at (KERNEL_RAM_VADDR - PG_DIR_SIZE) where PG_DIR_SIZE is 0x4000. So the value is
0xC0008000 - 0x4000 = 0xC0004000. The swapper_pg_dir is the virtual address of the initial page table.
Initial page tables are setup with r8 having the phys_offset, r9 with cpuid and r10 the processor info.
It returns r4 which contains the physical page table address.
Initially an identity mapping is done i.e. the virtual address will have the same physical address. This will
later be removed once the kernel starts up fully.
The i/o space is also mapped so that the UART can be used before the paging unit is initialized.
Virtual memory for address space.
Glossary:
Page Frames -> Physical pages. Each page frame contains a page i.e. length of page frame coincides with a page.
Page -> A block of data that is stored in a page frame or disk.
pgd -> Page global directory.
pmd -> Page middle directory.
pte -> Page table entry.
1) Each process has a structure associated with it called mm_struct(include/linux/mm_types.h). Like a process list the
mm_struct of each process are linked together as a linked list.
2) Each process has a pgd,pmd and a pte associated with it.
3) If a region is backed by a file, its vm_file (include/linux/fs.h) field will be set in "struct vm_region".
By traversing vm_file->f_dentry->d_inode->i_mapping,(linux/path.h,linux/dcache.h,linux/fs.h,linux/fs.h) the
associated address_space for the region may be obtained using the address_space_operations a_ops field. This
structure has all the filesystem specific information required to perform page-based operations on disk. This
structure is the address_space_operations which contains writepage,readpage etc. methods.
4) Initial parent mm_struct is initialized using INIT_MM_CONTEXT macro in mm/init-mm.c
5) A thread can be identified in the task list by finding all "task_structs" that have pointers to the same mm_struct.
6) Each memory region is respresented by a "vm_area_struct", which never overlaps. A full list of mapped regions that a
process has may be viewed using the proc interface at /proc/PID/maps.
7) VMA supports vma operations using the "vm_operations_struct" using the methods open(),close() and nopage().
8) mmap() is used to create new memory regions within a process. *DOUBT* Initial memory regions and initial process exec.
The pgd,pmd and pte are allocated in the kernel space. Verified by checking the address which is 0xC0000000 plus.(This is obvious).
** Each task's "thread_info" structure is allocated at the endo of its stack. The task element of the structure is a pointer to the
task's actual task_struct.(Ref: Linux Kernel Development book. Chapter 3 Pg 27) **
It is useful to be able to quickly look up the process descriptor of the currently executing task, which is done via current macro.
Exercise:
1) Given a process number traverse the mm_struct list and dump the pgd address.
I have written a rough test module for my understanding.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 | #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/printk.h> #include <linux/fs.h> #include <linux/device.h> #include <linux/cdev.h> #include <linux/thread_info.h> #include <linux/sched.h> #include <linux/mm.h> #include <linux/uaccess.h> #include <linux/spinlock.h> #include <linux/debugfs.h> #include <linux/seq_file.h> #define CLASS_NAME "processmemtest" #define DEV_FNAME "PROCESSMEMTESTMOD" #define DEV_COUNT 1 /* * Objective: * 1) Given a process number traverse the mm_struct list * and dump the pgd address. * * Bonus * ----- * 2) Create a debugfs file and dump the neccessary debug information to it. * 3) Extract the pgd for each task. */ /* * Design: * ------- * Create an attribute file and use it to write the process * number to it. Use it to traverse the mm_struct list and * display the pgd address either in the attribute file or * in dmesg. */ /* * */ static ssize_t process_mem_test_read( struct file *file, char __user *buff, size_t count, loff_t *offset ) { printk(KERN_ALERT "Process mem test read\n"); return 0; //Make the user space process exit read. } static ssize_t process_mem_test_write( struct file *file, const char __user *buff, size_t count, loff_t *offset) { printk(KERN_ALERT "Process mem test write\n"); return count; } static int process_mem_test_open( struct inode *inode, struct file *file ) { printk(KERN_ALERT "Process mem test open\n"); return 0; } static int process_mem_test_release( struct inode *inode, struct file *file ) { printk(KERN_ALERT "Process mem test release\n"); return 0; } struct file_operations process_mem_test_fops = { .owner = THIS_MODULE, .read = process_mem_test_read, .write = process_mem_test_write, .open = process_mem_test_open, .release = process_mem_test_release, }; dev_t process_mem_test_dev_no; struct process_mem_test_device { struct cdev cdev; } process_mem_test_dev; struct class *process_mem_test_class; struct device *process_mem_test_dev_info; ssize_t process_mem_test_attr_show(struct device *dev, struct device_attribute *attr, char *buf) { struct task_struct *current_task; struct vm_area_struct *vmarea_struct_addr; current_task = current; if(current_task != NULL) { printk(KERN_ALERT "Current task : %d", current_task->pid); /*printk(KERN_ALERT "Current task : %d, On CPU %d\n", current_task->pid,current_task->on_cpu);*/ printk(KERN_ALERT "mm: 0x%lx, active_mm 0x%lx\n", (unsigned long)current_task->mm, (unsigned long)current_task->active_mm); printk(KERN_ALERT "Page global directory : 0x%lx\n", (unsigned long)current_task->mm->pgd); printk(KERN_ALERT "mmap base : 0x%lx", (unsigned long)current_task->mm->mmap_base); vmarea_struct_addr = current_task->mm->mmap; while(vmarea_struct_addr != NULL) { printk(KERN_ALERT "vm_start : 0x%lx, vm_end : 0x%lx\n", (unsigned long)vmarea_struct_addr->vm_start, (unsigned long)vmarea_struct_addr->vm_end); vmarea_struct_addr = vmarea_struct_addr->vm_next; } } else { printk(KERN_ALERT "Current task NULL\n"); } return sprintf(buf,"attrib show\n"); } void my_follow_page(struct mm_struct *mm, unsigned long addr_res) { pgd_t *pgd; pmd_t *pmd; pud_t *pud; pte_t *ptep, pte; unsigned long pfn; struct page *page; // char byte_val = 0; down_read(&(mm->mmap_sem)); pgd = pgd_offset(mm,addr_res); /* copy_from_user(&byte_val,addr_res,1); printk(KERN_ALERT "virt addr: 0x%lx, byte val : 0x%lx\n", addr_res, byte_val);*/ if(pgd_none(*pgd) || pgd_bad(*pgd)) { printk(KERN_ALERT "pgd bad\n"); return; } else { printk(KERN_ALERT "pgd 0x%lx\n",(unsigned long)pgd); } pud = pud_offset(pgd,addr_res); if(pud_none(*pud) || pud_bad(*pud)) { printk(KERN_ALERT "pud bad\n"); return; } else { printk(KERN_ALERT "pud 0x%lx\n",(unsigned long)pud); } pmd = pmd_offset(pud,addr_res); if(pmd_none(*pmd) || pmd_bad(*pmd)) { printk(KERN_ALERT "pmd bad\n"); return; } else { printk(KERN_ALERT "pmd 0x%lx\n",(unsigned long)pmd); } ptep = pte_offset_map(pmd,addr_res); if(!ptep) { printk(KERN_ALERT "ptep bad\n"); } else { printk(KERN_ALERT "ptep 0x%lx\n",(unsigned long)ptep); } pte = *ptep; if(pte_present(pte)) { printk(KERN_ALERT "pte : 0x%lx\n",(unsigned long)pte); page = pte_page(pte); } else { printk(KERN_ALERT "pte not present\n"); } printk(KERN_ALERT "pte with offset 0x%lx offset : 0x%lx\n", pte+((addr_res) & ((1<<PAGE_SHIFT)-1)), addr_res & ((1<<PAGE_SHIFT)-1)); printk(KERN_ALERT "pfn from pte : 0x%lx\n",pfn = pte_pfn(pte)); printk(KERN_ALERT "pfn to addr : 0x%lx, addr_res : 0x%lx\n",(pfn<<PAGE_SHIFT), (unsigned long)PAGE_MASK); printk(KERN_ALERT "phys_addr : 0x%lx\n",(pfn<<PAGE_SHIFT) + (addr_res & ~PAGE_MASK)); up_read(&(mm->mmap_sem)); } //#define LOCK_TEST #undef LOCK_TEST #define MAP_REGION 0x100000 ssize_t process_mem_test_attr_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct task_struct *current_task; unsigned long addr_res; struct vm_area_struct *vmarea_struct_addr; unsigned int i = 0; #ifdef LOCK_TEST DEFINE_SPINLOCK(test_lock); spin_lock_irq(&test_lock); #endif current_task = current; if(current_task != NULL) { printk(KERN_ALERT "\nCurrent task pid: %d\n", current_task->pid); printk(KERN_ALERT "mm: 0x%lx, active_mm 0x%lx\n", (unsigned long)current_task->mm, (unsigned long)current_task->active_mm); printk(KERN_ALERT "Page global directory : 0x%lx\n", (unsigned long)current_task->mm->pgd); printk(KERN_ALERT "mmap base : 0x%lx", (unsigned long)current_task->mm->mmap_base); vmarea_struct_addr = current_task->mm->mmap; while(vmarea_struct_addr != NULL) { printk(KERN_ALERT "vm_start : 0x%lx, vm_end : 0x%lx\n", (unsigned long)vmarea_struct_addr->vm_start, (unsigned long)vmarea_struct_addr->vm_end); vmarea_struct_addr = vmarea_struct_addr->vm_next; } } else { printk(KERN_ALERT "Current task NULL\n"); } if(kstrtol(buf,10,&addr_res) != 0) { printk(KERN_ALERT "Error converting to long\n"); return count; } // copy_from_user(&kval,(unsigned int *)addr_res,4); // printk(KERN_ALERT "kval : %x\n",kval); //addr_res = MAP_REGION; printk(KERN_ALERT "addr: 0x%lx\n",addr_res); my_follow_page(current_task->mm, addr_res+i); #ifdef LOCK_TEST while(1) ; printk(KERN_ALERT "After lock\n"); #endif return count; } #define TEST_SIZE 4LL int test_arr[TEST_SIZE] = {5,4,3,2}; /* * Explanation for the below code * * Initially "start" is called. Do all init's,holding locks in this * function. After this "show" is called. This is right after "start" * and is the first iteration. After this "next" is called where * we increment the iterator. After this "show" is called. If in * "next" we reach the end we return NULL. This triggers the call to * "stop". A call will be done to start again where *pos is checked * and return NULL which exits the sequence. * * General Sequence: * ----------------- * Start -> Show -> Next -> Show -> Next ->.. Next-> Stop-> Start-> Stop. */ unsigned char STOP_FLAG = 0; void * mem_dbg_start(struct seq_file *m, loff_t *pos) { struct vm_area_struct *vmarea_struct_addr; printk(KERN_ALERT "[GAUN] In %s\n",__FUNCTION__); if(STOP_FLAG) { STOP_FLAG = 0; return NULL; } if(current == NULL) return NULL; vmarea_struct_addr = current->mm->mmap; if(vmarea_struct_addr == NULL) return NULL; seq_printf(m,"Current task : %d\n", current->pid); seq_printf(m,"mm: 0x%lx, active_mm 0x%lx\n", (unsigned long)current->mm, (unsigned long)current->active_mm); seq_printf(m,"Page global directory : 0x%lx\n", (unsigned long)current->mm->pgd); seq_printf(m,"mmap base : 0x%lx\n", (unsigned long)current->mm->mmap_base); return vmarea_struct_addr; /*printk(KERN_ALERT "In %s pos : %lld\n",__FUNCTION__,*pos); if((*pos) == TEST_SIZE) return NULL; return test_arr;*/ } void * mem_dbg_next(struct seq_file *m, void *v, loff_t *pos) { struct vm_area_struct *vmarea_struct_addr; vmarea_struct_addr = (struct vm_area_struct *)v; vmarea_struct_addr = vmarea_struct_addr->vm_next; if(vmarea_struct_addr == NULL) { STOP_FLAG = 1; return NULL; } return vmarea_struct_addr; /* (*pos)++; if((*pos) == TEST_SIZE) { printk(KERN_ALERT "[GAUN] Match\n"); return NULL; } printk(KERN_ALERT "In %s pos : %lld\n",__FUNCTION__,*pos); return test_arr+(*pos);*/ } int mem_dbg_show(struct seq_file *m, void *v) { struct vm_area_struct *vmarea_struct_addr; vmarea_struct_addr = (struct vm_area_struct *) v; printk(KERN_ALERT "[GAUN] In %s\n",__FUNCTION__); if(vmarea_struct_addr != NULL) seq_printf(m,"vm_start : 0x%lx, vm_end : 0x%lx\n", (unsigned long)vmarea_struct_addr->vm_start, (unsigned long)vmarea_struct_addr->vm_end); /* if(v != NULL) seq_printf(m,"%x ",*((int *)v));*/ return 0; } void mem_dbg_stop(struct seq_file *m, void *v) { printk(KERN_ALERT "[GAUN] In %s\n",__FUNCTION__); } static const struct seq_operations seq_dbg_ops = { .start = mem_dbg_start, .next = mem_dbg_next, .stop = mem_dbg_stop, .show = mem_dbg_show, }; int process_mem_dbg_open(struct inode *inode, struct file *file) { return seq_open(file,&seq_dbg_ops); } static const struct file_operations process_mem_dbg_fops = { .open = process_mem_dbg_open, .read = seq_read, .llseek = seq_lseek, .release = seq_release, }; DEVICE_ATTR( process_mem_test, S_IRWXU|S_IRWXG|S_IRWXO, process_mem_test_attr_show, process_mem_test_attr_store ); struct dentry *process_mem_dir; struct dentry *process_mem_dbgfile; static int __init process_mem_test_init(void) { int retval = 0; printk(KERN_ALERT "Process mem test init\n"); retval = alloc_chrdev_region( &process_mem_test_dev_no, 0, DEV_COUNT, DEV_FNAME ); if(retval == 0) { printk(KERN_ALERT "Allocated char region with Major number : %d, Minor number : %d\n", MAJOR(process_mem_test_dev_no), MINOR(process_mem_test_dev_no)); } else { printk(KERN_ALERT "Could not allocate char region\n"); return retval; } cdev_init(&(process_mem_test_dev.cdev), &process_mem_test_fops); process_mem_test_dev.cdev.owner = THIS_MODULE; retval = cdev_add(&process_mem_test_dev.cdev, process_mem_test_dev_no,DEV_COUNT); if(retval != 0) { printk(KERN_ALERT "Could not add character device\n"); return retval; } process_mem_test_class = class_create(THIS_MODULE,CLASS_NAME); process_mem_test_dev_info = device_create( process_mem_test_class, NULL, process_mem_test_dev_no, NULL, "process_mem_test_dev_0" ); retval = device_create_file( process_mem_test_dev_info, &dev_attr_process_mem_test ); if(retval != 0) { printk(KERN_ALERT "Could not create device file\n"); return retval; } process_mem_dir = debugfs_create_dir( "process_mem_dbg", NULL); if(process_mem_dir == NULL) { printk(KERN_ALERT "Could not create directory in debugfs\n"); } else { process_mem_dbgfile = debugfs_create_file( "process_mem_test", 0600, process_mem_dir, NULL, &process_mem_dbg_fops); } return 0; } static void __exit process_mem_test_exit(void) { printk(KERN_ALERT "Process mem test exit\n"); unregister_chrdev_region(process_mem_test_dev_no, DEV_COUNT); device_destroy(process_mem_test_class, process_mem_test_dev_no); class_destroy(process_mem_test_class); cdev_del(&process_mem_test_dev.cdev); debugfs_remove(process_mem_dbgfile); debugfs_remove(process_mem_dir); } module_init(process_mem_test_init); module_exit(process_mem_test_exit); MODULE_LICENSE("GPL"); MODULE_AUTHOR("TEST"); MODULE_DESCRIPTION("Process mem test"); |
The output log file captured is as follows:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 | root@pathfinder:~# insmd od process_mem_test.ko [ 87.482043] Process mem test init [ 87.482164] Allocated char region with Major number : 250, Minor number : 0 root@pathfinder:~# [ 109.271821] [ 109.271821] Current task pid: 2392 [ 109.271916] mm: 0xc3b35c00, active_mm 0xc3b35c00 [ 109.275625] Page global directory : 0xc3af4000 [ 109.279979] mmap base : 0xb6fc4000 [ 109.283138] vm_start : 0x8000, vm_end : 0x9000 [ 109.287658] vm_start : 0x10000, vm_end : 0x11000 [ 109.292181] vm_start : 0xb6e60000, vm_end : 0xb6f89000 [ 109.297215] vm_start : 0xb6f89000, vm_end : 0xb6f90000 [ 109.302250] vm_start : 0xb6f90000, vm_end : 0xb6f92000 [ 109.307284] vm_start : 0xb6f92000, vm_end : 0xb6f93000 [ 109.312319] vm_start : 0xb6f93000, vm_end : 0xb6f96000 [ 109.317355] vm_start : 0xb6f9e000, vm_end : 0xb6fbb000 [ 109.322390] vm_start : 0xb6fbe000, vm_end : 0xb6fc1000 [ 109.262697] vm_start : 0xb6fc1000, vm_end : 0xb6fc2000 [ 109.267731] vm_start : 0xb6fc2000, vm_end : 0xb6fc3000 [ 109.272766] vm_start : 0xb6fc3000, vm_end : 0xb6fc4000 [ 109.277801] vm_start : 0xbec00000, vm_end : 0xbec22000 [ 109.282841] kval : 1234 [ 109.285221] addr: 10830 [ 109.287612] pgd 0xc3af4000 [ 109.290257] pud 0xc3af4000 [ 109.292903] pmd 0xc3af4000 [ 109.295548] ptep 0xc2e17040 [ 109.298279] pte : 0x322d814f [ 109.301097] pte with offset 0x322d897f offset : 0x830 U-Boot 1.3.2-mini2440 (Feb 24 2014 - 23:40:48) I2C: ready DRAM: 64 MB NOR Flash not found. Use hardware switch and 'flinit' Flash: 0 kB NAND: 256 MiB Found Environment offset in OOB.. USB: S3C2410 USB Deviced In: serial Out: serial Err: serial MAC: 08:08:11:18:12:27 Hit any key to stop autoboot: 3 0 MINI2440 # md.b 0x322d814f 1000 0 500 322d814f: 00 01 00 00 00 47 4e 55 00 00 00 00 00 02 00 00 .....GNU........ 322d815f: 00 06 00 00 00 1a 00 00 00 04 00 00 00 14 00 00 ................ 322d816f: 00 03 00 00 00 47 4e 55 00 11 ef 02 49 29 da 5d .....GNU....I).] 322d817f: 6a 2e df 8b 7d 02 2f a5 3d cb e0 f3 e7 03 00 00 j...}./.=....... 322d818f: 00 0b 00 00 00 09 00 00 00 02 00 00 00 08 00 00 ................ 322d819f: 00 00 00 00 00 00 00 00 00 0a 00 00 00 06 00 00 ................ 322d81af: 00 00 00 00 00 04 00 00 00 05 00 00 00 01 00 00 ................ 322d81bf: 00 03 00 00 00 07 00 00 00 00 00 00 00 03 00 00 ................ 322d81cf: 00 02 00 00 00 02 00 00 00 06 00 00 00 00 4a 21 ..............J! 322d81df: 38 88 40 a0 21 02 00 00 00 04 00 00 00 0a 00 00 8.@.!........... 322d81ef: 00 9c bb 93 1c 0b 0f b5 a5 b8 2b 6b 15 e2 41 72 ..........+k..Ar 322d81ff: f0 76 d7 9b 7c 50 b5 a8 10 7c ed 11 0f 5b 9a 3b .v..|P...|...[.; 322d820f: 0f 2f 4e 3d f6 00 00 00 00 00 00 00 00 00 00 00 ./N=............ 322d821f: 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 ................ 322d822f: 00 20 00 00 00 28 00 00 00 18 84 00 00 00 00 00 . ...(.......... 322d823f: 00 12 00 00 00 1a 00 00 00 30 84 00 00 00 00 00 .........0...... 322d824f: 00 12 00 00 00 1b 00 00 00 dc 83 00 00 00 00 00 ................ 322d825f: 00 12 00 00 00 2f 00 00 00 e8 83 00 00 00 00 00 ...../.......... 322d826f: 00 12 00 00 00 3d 00 00 00 0c 84 00 00 00 00 00 .....=.......... 322d827f: 00 12 00 00 00 54 00 00 00 24 84 00 00 00 00 00 .....T...$...... 322d828f: 00 12 00 00 00 22 00 00 00 3c 84 00 00 00 00 00 ....."...<...... 322d829f: 00 12 00 00 00 37 00 00 00 48 84 00 00 00 00 00 .....7...H...... 322d82af: 00 12 00 00 00 42 00 00 00 f4 83 00 00 00 00 00 .....B.......... 322d82bf: 00 12 00 00 00 00 5f 5f 67 6d 6f 6e 5f 73 74 61 ......__gmon_sta 322d82cf: 72 74 5f 5f 00 6c 69 62 63 2e 73 6f 2e 36 00 73 rt__.libc.so.6.s 322d82df: 70 72 69 6e 74 66 00 61 62 6f 72 74 00 73 74 72 printf.abort.str 322d82ef: 6c 65 6e 00 67 65 74 63 68 61 72 00 63 6c 6f 73 len.getchar.clos 322d82ff: 65 00 6f 70 65 6e 00 5f 5f 6c 69 62 63 5f 73 74 e.open.__libc_st 322d830f: 61 72 74 5f 6d 61 69 6e 00 77 72 69 74 65 00 47 art_main.write.G 322d831f: 4c 49 42 43 5f 32 2e 34 00 00 00 00 00 02 00 02 LIBC_2.4........ 322d832f: 00 02 00 02 00 02 00 02 00 02 00 02 00 02 00 00 ................ 322d833f: 00 01 00 01 00 10 00 00 00 10 00 00 00 00 00 00 ................ 322d834f: 00 14 69 69 0d 00 00 02 00 5a 00 00 00 00 00 00 ..ii.....Z...... 322d835f: 00 24 08 01 00 15 01 00 00 fc 07 01 00 16 04 00 .$.............. 322d836f: 00 00 08 01 00 16 05 00 00 04 08 01 00 16 0a 00 ................ 322d837f: 00 08 08 01 00 16 01 00 00 0c 08 01 00 16 06 00 ................ 322d838f: 00 10 08 01 00 16 02 00 00 14 08 01 00 16 07 00 ................ 322d839f: 00 18 08 01 00 16 03 00 00 1c 08 01 00 16 08 00 ................ 322d83af: 00 20 08 01 00 16 09 00 00 10 40 2d e9 33 00 00 . ........@-.3.. 322d83bf: eb 10 40 bd e8 1e ff 2f e1 04 e0 2d e5 04 e0 9f ..@..../...-.... 322d83cf: e5 0e e0 8f e0 08 f0 be e5 18 84 00 00 00 c6 8f ................ 322d83df: e2 08 ca 8c e2 18 f4 bc e5 00 c6 8f e2 08 ca 8c ................ 322d83ef: e2 10 f4 bc e5 00 c6 8f e2 08 ca 8c e2 08 f4 bc ................ 322d83ff: e5 00 c6 8f e2 08 ca 8c e2 00 f4 bc e5 00 c6 8f ................ 322d840f: e2 08 ca 8c e2 f8 f3 bc e5 00 c6 8f e2 08 ca 8c ................ 322d841f: e2 f0 f3 bc e5 00 c6 8f e2 08 ca 8c e2 e8 f3 bc ................ 322d842f: e5 00 c6 8f e2 08 ca 8c e2 e0 f3 bc e5 00 c6 8f ................ 322d843f: e2 08 ca 8c e2 d8 f3 bc e5 00 c6 8f e2 08 ca 8c ................ 322d844f: e2 d0 f3 bc e5 00 b0 a0 e3 00 e0 a0 e3 04 10 9d ................ 322d845f: e4 0d 20 a0 e1 04 20 2d e5 04 00 2d e5 10 c0 9f .. ... -...-.... 322d846f: e5 04 c0 2d e5 0c 00 9f e5 0c 30 9f e5 dc ff ff ...-......0..... 322d847f: eb ed ff ff eb 00 86 00 00 0c 85 00 00 04 86 00 ................ 322d848f: 00 1c 30 9f e5 1c 20 9f e5 03 30 8f e0 02 20 93 ..0... ...0... . 322d849f: e7 00 00 52 e3 10 40 2d e9 d4 ff ff 1b 10 40 bd ...R..@-......@. 322d84af: e8 1e ff 2f e1 50 83 00 00 34 00 00 00 10 30 9f .../.P...4....0. 322d84bf: e5 00 20 d3 e5 00 00 52 e3 01 20 a0 03 00 20 c3 .. ....R.. ... . 322d84cf: 05 1e ff 2f e1 34 08 01 00 24 00 9f e5 08 40 2d .../.4...$....@- 322d84df: e9 00 30 90 e5 00 00 53 e3 03 00 00 0a 14 30 9f ..0....S......0. 322d84ef: e5 00 00 53 e3 0f e0 a0 11 13 ff 2f 11 08 40 bd ...S......./..@. 322d84ff: e8 1e ff 2f e1 fc 06 01 00 00 00 00 00 00 48 2d .../..........H- 322d850f: e9 04 b0 8d e2 01 da 4d e2 10 d0 4d e2 c0 30 9f .......M...M..0. 322d851f: e5 04 20 4b e2 03 00 82 e7 b8 30 9f e5 04 20 4b .. K......0... K 322d852f: e2 03 10 82 e7 b0 00 9f e5 02 10 a0 e3 b2 ff ff ................ 322d853f: eb 08 00 0b e5 a4 30 9f e5 03 00 a0 e1 a0 10 9f ......0......... 322d854f: e5 a1 ff ff eb 9c 20 9f e5 01 3a 4b e2 04 30 43 ...... ...:K..0C 322d855f: e2 04 30 43 e2 03 00 a0 e1 02 10 a0 e1 80 20 9f ..0C.......... . 322d856f: e5 ae ff ff eb 80 20 9f e5 01 3a 4b e2 04 30 43 ...... ...:K..0C 322d857f: e2 04 30 43 e2 02 00 a0 e1 03 10 a0 e1 92 ff ff ..0C............ 322d858f: eb 01 3a 4b e2 04 30 43 e2 04 30 43 e2 03 00 a0 ..:K..0C..0C.... 322d859f: e1 9c ff ff eb 00 30 a0 e1 01 20 83 e2 01 3a 4b ......0... ...:K 322d85af: e2 04 30 43 e2 04 30 43 e2 08 00 1b e5 03 10 a0 ..0C..0C........ 322d85bf: e1 97 ff ff eb 08 00 1b e5 9e ff ff eb 85 ff ff ................ 322d85cf: eb 00 30 a0 e3 03 00 a0 e1 04 d0 4b e2 00 48 bd ..0........K..H. 322d85df: e8 1e ff 2f e1 f4 ef ff ff f0 ef ff ff 84 86 00 .../............ 322d85ef: 00 c8 86 00 00 30 08 01 00 d4 86 00 00 dc 86 00 .....0.......... 322d85ff: 00 1e ff 2f e1 f0 47 2d e9 58 a0 9f e5 58 50 9f .../..G-.X...XP. 322d860f: e5 00 60 a0 e1 01 70 a0 e1 02 80 a0 e1 65 ff ff ..`...p......e.. 322d861f: eb 48 30 9f e5 05 50 6a e0 03 30 8f e0 45 51 b0 .H0...Pj..0..EQ. 322d862f: e1 0a a0 83 e0 09 00 00 0a 00 40 a0 e3 06 00 a0 ..........@..... 322d863f: e1 07 10 a0 e1 08 20 a0 e1 04 c1 9a e7 0f e0 a0 ...... ......... 322d864f: e1 1c ff 2f e1 01 40 84 e2 05 00 54 e1 f6 ff ff .../..@....T.... 322d865f: 3a f0 47 bd e8 1e ff 2f e1 04 ff ff ff 08 ff ff :.G..../........ 322d866f: ff c0 81 00 00 10 40 2d e9 10 40 bd e8 1e ff 2f ......@-..@..../ 322d867f: e1 01 00 02 00 2f 73 79 73 2f 63 6c 61 73 73 2f ...../sys/class/ 322d868f: 70 72 6f 63 65 73 73 6d 65 6d 74 65 73 74 2f 70 processmemtest/p 322d869f: 72 6f 63 65 73 73 5f 6d 65 6d 5f 74 65 73 74 5f rocess_mem_test_ 322d86af: 64 65 76 5f 30 2f 70 72 6f 63 65 73 73 5f 6d 65 dev_0/process_me 322d86bf: 6d 5f 74 65 73 74 00 00 00 61 64 64 72 20 3a 20 m_test...addr : 322d86cf: 25 6c 78 0a 00 25 6c 75 0a 00 00 00 00 62 75 66 %lx..%lu.....buf 322d86df: 66 20 3a 20 25 73 0a 00 00 6c fd ff 7f 01 00 00 f : %s...l...... 322d86ef: 00 00 00 00 00 d8 84 00 00 bc 84 00 00 00 00 00 ................ 322d86ff: 00 01 00 00 00 10 00 00 00 0c 00 00 00 b8 83 00 ................ 322d870f: 00 0d 00 00 00 74 86 00 00 19 00 00 00 f4 06 01 .....t.......... 322d871f: 00 1b 00 00 00 04 00 00 00 1a 00 00 00 f8 06 01 ................ 322d872f: 00 1c 00 00 00 04 00 00 00 04 00 00 00 8c 81 00 ................ 322d873f: 00 f5 fe ff 6f cc 81 00 00 05 00 00 00 c4 82 00 ....o........... 322d874f: 00 06 00 00 00 14 82 00 00 0a 00 00 00 64 00 00 .............d.. 322d875f: 00 0b 00 00 00 10 00 00 00 15 00 00 00 44 39 fc .............D9. 322d876f: b6 03 00 00 00 f0 07 01 00 02 00 00 00 50 00 00 .............P.. 322d877f: 00 14 00 00 00 11 00 00 00 17 00 00 00 68 83 00 .............h.. 322d878f: 00 11 00 00 00 60 83 00 00 12 00 00 00 08 00 00 .....`.......... 322d879f: 00 13 00 00 00 08 00 00 00 fe ff ff 6f 40 83 00 ............o@.. 322d87af: 00 ff ff ff 6f 01 00 00 00 f0 ff ff 6f 28 83 00 ....o.......o(.. 322d87bf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d87cf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d87df: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d87ef: 00 00 07 01 00 58 39 fc b6 3c 2d fb b6 c0 68 ea .....X9..<-...h. 322d87ff: b6 c8 83 00 00 78 55 e7 b6 c8 83 00 00 c0 dc f1 .....xU......... 322d880f: b6 c8 83 00 00 c8 83 00 00 3c 69 ea b6 c8 83 00 .........<i..... 322d881f: 00 c8 83 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d882f: 00 34 12 00 00 00 00 00 00 00 00 00 00 00 00 00 .4.............. 322d883f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d884f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d885f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d886f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d887f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d888f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d889f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d88af: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d88bf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d88cf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d88df: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d88ef: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d88ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d890f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d891f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d892f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d893f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d894f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d895f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d896f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d897f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d898f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d899f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d89af: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d89bf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d89cf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d89df: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d89ef: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d89ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a0f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a1f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a2f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a3f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a4f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a5f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a6f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a7f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a8f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8a9f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8aaf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8abf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8acf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8adf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8aef: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8aff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b0f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b1f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b2f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b3f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b4f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b5f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b6f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b7f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b8f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8b9f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8baf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8bbf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8bcf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8bdf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8bef: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8bff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c0f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c1f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c2f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c3f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c4f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c5f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c6f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c7f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c8f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8c9f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8caf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8cbf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8ccf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8cdf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8cef: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8cff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d0f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d1f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d2f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d3f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d4f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d5f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d6f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d7f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d8f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8d9f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8daf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8dbf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8dcf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8ddf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8def: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8dff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e0f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e1f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e2f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e3f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e4f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e5f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e6f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e7f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e8f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8e9f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8eaf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8ebf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8ecf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8edf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8eef: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8eff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f0f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f1f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f2f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f3f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f4f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f5f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f6f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f7f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f8f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8f9f: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8faf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8fbf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8fcf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8fdf: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8fef: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d8fff: 00 f8 be 00 00 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H..... 322d908f: 00 d4 1e a2 b6 00 00 00 00 70 1d a2 b6 9c 80 87 .........p...... 322d909f: b6 00 00 00 00 00 61 65 61 62 69 00 01 21 00 00 ......aeabi..!.. 322d90af: 00 05 34 54 00 06 02 08 01 09 01 12 04 14 01 15 ..4T............ 322d90bf: 01 17 03 18 01 19 01 1a 02 1e 02 2c 01 6c 69 62 ...........,.lib 322d90cf: 6e 73 73 5f 64 6e 73 2d 32 2e 31 33 2e 73 6f 00 nss_dns-2.13.so. 322d90df: 00 18 43 22 a0 00 2e 73 68 73 74 72 74 61 62 00 ..C"...shstrtab. 322d90ef: 2e 6e 6f 74 65 2e 67 6e 75 2e 62 75 69 6c 64 2d .note.gnu.build- 322d90ff: 69 64 00 2e 6e 6f 74 65 2e 41 42 49 2d 74 61 67 id..note.ABI-tag 322d910f: 00 2e 67 6e 75 2e 68 61 73 68 00 2e 64 79 6e 73 ..gnu.hash..dyns 322d911f: 79 6d 00 2e 64 79 6e 73 74 72 00 2e 67 6e 75 2e ym..dynstr..gnu. 322d912f: 76 65 72 73 69 6f 6e 00 2e 67 6e 75 2e 76 65 72 version..gnu.ver 322d913f: 73 69 6f 6e 5f 64 00 2e 67 6e 75 2e 76 65 72 73 sion_d..gnu.vers 322d914f: 69 6f 6e 5f 72 00 2e 72 65 6c 2e 64 79 6e 00 2e ion_r..rel.dyn.. 322d915f: 72 65 6c 2e 70 6c 74 00 2e 69 6e 69 74 00 2e 74 rel.plt..init..t 322d916f: 65 78 74 00 2e 66 69 6e 69 00 2e 72 6f 64 61 74 ext..fini..rodat 322d917f: 61 00 2e 69 6e 74 65 72 70 00 2e 65 68 5f 66 72 a..interp..eh_fr 322d918f: 61 6d 65 00 2e 69 6e 69 74 5f 61 72 72 61 79 00 ame..init_array. 322d919f: 2e 66 69 6e 69 5f 61 72 72 61 79 00 2e 6a 63 72 .fini_array..jcr 322d91af: 00 2e 64 79 6e 61 6d 69 63 00 2e 67 6f 74 00 2e ..dynamic..got.. 322d91bf: 64 61 74 61 00 2e 62 73 73 00 2e 41 52 4d 2e 61 data..bss..ARM.a 322d91cf: 74 74 72 69 62 75 74 65 73 00 2e 67 6e 75 5f 64 ttributes..gnu_d 322d91df: 65 62 75 67 6c 69 6e 6b 00 00 00 00 00 00 00 00 ebuglink........ 322d91ef: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d91ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 322d920f: 00 0b 00 00 00 07 00 00 00 02 00 00 00 34 01 00 .............4.. 322d921f: 00 34 01 00 00 24 00 00 00 00 00 00 00 00 00 00 .4...$.......... 322d922f: 00 04 00 00 00 00 00 00 00 1e 00 00 00 07 00 00 ................ 322d923f: 00 02 00 00 00 58 01 00 00 58 01 00 00 20 00 00 .....X...X... .. 322d924f: 00 00 00 00 00 00 00 00 00 04 00 00 00 00 00 00 ................ 322d925f: 00 2c 00 00 00 f6 ff ff 6f 02 00 00 00 78 01 00 .,......o....x.. 322d926f: 00 78 01 00 00 74 00 00 00 04 00 00 00 00 00 00 .x...t.......... 322d927f: 00 04 00 00 00 04 00 00 00 36 00 00 00 0b 00 00 .........6...... 322d928f: 00 02 00 00 00 ec 01 00 00 ec 01 00 00 d0 02 00 ................ 322d929f: 00 05 00 00 00 03 00 00 00 04 00 00 00 10 00 00 ................ 322d92af: 00 3e 00 00 00 03 00 00 00 02 00 00 00 bc 04 00 .>.............. 322d92bf: 00 bc 04 00 00 b2 02 00 00 00 00 00 00 00 00 00 ................ 322d92cf: 00 01 00 00 00 00 00 00 00 46 00 00 00 ff ff ff .........F...... 322d92df: 6f 02 00 00 00 6e 07 00 00 6e 07 00 00 5a 00 00 o....n...n...Z.. 322d92ef: 00 04 00 00 00 00 00 00 00 02 00 00 00 02 00 00 ................ 322d92ff: 00 53 00 00 00 fd ff ff 6f 02 00 00 00 c8 07 00 .S......o....... 322d930f: 00 c8 07 00 00 38 00 00 00 05 00 00 00 02 00 00 .....8.......... 322d931f: 00 04 00 00 00 00 00 00 00 62 00 00 00 fe ff ff .........b...... 322d932f: 6f 02 00 00 00 00 08 00 00 00 08 00 00 60 00 00 o............`.. 322d933f: 00 05 00 00 00 02 00 00 00 04 00 00 00 00 00 00 ................ 322d934f: 00 71 00 00 00 09 00 00 00 02 00 00 00 60 08 00 .q...........`.. 322d935f: 00 60 08 00 00 40 00 00 00 04 00 00 00 00 00 00 .`...@.......... 322d936f: 00 04 00 00 00 08 00 00 00 7a 00 00 00 09 00 00 .........z...... 322d937f: 00 02 00 00 00 a0 08 00 00 a0 08 00 00 f8 00 00 ................ 322d938f: 00 04 00 00 00 0c 00 00 00 04 00 00 00 08 00 00 ................ 322d939f: 00 83 00 00 00 01 00 00 00 06 00 00 00 98 09 00 ................ 322d93af: 00 98 09 00 00 10 00 00 00 00 00 00 00 00 00 00 ................ 322d93bf: 00 04 00 00 00 00 00 00 00 7e 00 00 00 01 00 00 .........~...... 322d93cf: 00 06 00 00 00 a8 09 00 00 a8 09 00 00 88 01 00 ................ 322d93df: 00 00 00 00 00 00 00 00 00 04 00 00 00 04 00 00 ................ 322d93ef: 00 89 00 00 00 01 00 00 00 06 00 00 00 30 0b 00 .............0.. 322d93ff: 00 30 0b 00 00 6c 28 00 00 00 00 00 00 00 00 00 .0...l(......... 322d940f: 00 04 00 00 00 00 00 00 00 8f 00 00 00 01 00 00 ................ 322d941f: 00 06 00 00 00 9c 33 00 00 9c 33 00 00 0c 00 00 ......3...3..... 322d942f: 00 00 00 00 00 00 00 00 00 04 00 00 00 00 00 00 ................ 322d943f: 00 95 00 00 00 01 00 00 00 02 00 00 00 a8 33 00 ..............3. 322d944f: 00 a8 33 00 00 54 01 00 00 00 00 00 00 00 00 00 ..3..T.......... 322d945f: 00 04 00 00 00 00 00 00 00 9d 00 00 00 01 00 00 ................ 322d946f: 00 02 00 00 00 fc 34 00 00 fc 34 00 00 14 00 00 ......4...4..... 322d947f: 00 00 00 00 00 00 00 00 00 04 00 00 00 00 00 00 ................ 322d948f: 00 a5 00 00 00 01 00 00 00 02 00 00 00 10 35 00 ..............5. 322d949f: 00 10 35 00 00 04 00 00 00 00 00 00 00 00 00 00 ..5............. 322d94af: 00 04 00 00 00 00 00 00 00 30 00 00 00 05 00 00 .........0...... 322d94bf: 00 02 00 00 00 14 35 00 00 14 35 00 00 e4 01 00 ......5...5..... 322d94cf: 00 04 00 00 00 00 00 00 00 04 00 00 00 04 00 00 ................ 322d94df: 00 af 00 00 00 0e 00 00 00 03 00 00 00 ec be 00 ................ 322d94ef: 00 ec 3e 00 00 04 00 00 00 00 00 00 00 00 00 00 ..>............. 322d94ff: 00 04 00 00 00 00 00 00 00 bb 00 00 00 0f 00 00 ................ 322d950f: 00 03 00 00 00 f0 be 00 00 f0 3e 00 00 04 00 00 ..........>..... 322d951f: 00 00 00 00 00 00 00 00 00 04 00 00 00 00 00 00 ................ 322d952f: 00 c7 00 00 00 01 00 00 00 03 00 00 00 f4 be 00 ................ 322d953f: 00 f4 3e 00 00 04 00 00 00 00 00 00 00 00 00 00 ..>............. 322d954f: 00 04 00 00 00 00 00 00 00 cc 00 00 00 06 00 00 ................ 322d955f: 00 03 00 00 00 f8 be 00 00 f8 3e 00 00 08 01 00 ..........>..... 322d956f: 00 05 00 00 00 00 00 00 00 04 00 00 00 08 00 00 ................ 322d957f: 00 d5 00 00 00 01 00 00 00 03 00 00 00 00 c0 00 ................ 322d958f: 00 00 40 00 00 9c 00 00 00 00 00 00 00 00 00 00 ..@............. 322d959f: 00 04 00 00 00 04 00 00 00 da 00 00 00 01 00 00 ................ 322d95af: 00 03 00 00 00 9c c0 00 00 9c 40 00 00 04 00 00 ..........@..... 322d95bf: 00 00 00 00 00 00 00 00 00 04 00 00 00 00 00 00 ................ 322d95cf: 00 e0 00 00 00 08 00 00 00 03 00 00 00 a0 c0 00 ................ 322d95df: 00 a0 40 00 00 04 00 00 00 00 00 00 00 00 00 00 ..@............. 322d95ef: 00 01 00 00 00 00 00 00 00 e5 00 00 00 03 00 00 ................ 322d95ff: 70 00 00 00 00 00 00 00 00 a0 40 00 00 2c 00 00 p.........@..,.. 322d960f: 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 ................ 322d961f: 00 f5 00 00 00 01 00 00 00 00 00 00 00 00 00 00 ................ 322d962f: 00 cc 40 00 00 18 00 00 00 00 00 00 00 00 00 00 ..@............. 322d963f: 00 01 00 00 00 00 00 00 00 01 00 00 00 03 00 00 ................ MINI2440 # |
"People think that computer science is the art of geniuses but the
actual reality is the opposite, just many people doing things that build
on each other, like a wall of mini stones."
- Donald Knuth
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